The first ARTIQ core devices used hardware built in-house by physicists (based on a Xilinx KC705 development board with custom FMC cards). To improve the quality, features and scalability of ARTIQ systems, we have been developing the Sinara device family. It aims at providing turnkey control hardware that is reproducible, open, flexible, modular, well-tested, and well-supported by the ARTIQ control software.
The Sinara hardware is in active development, and the latest information is available on the wiki of each project's page. Most of the hardware engineering is done at the Institute for Electronics Systems at the Warsaw University of Technology.
One of the main devices in the Sinara family is the Kasli core device. It contains an Artix-7 100T FPGA, DDR3 SDRAM, three SFP connectors, and can control up to 8 daughtercards (Eurocard Extension Module, EEM). The Kasli and its EEMs are installed in one Eurocard 3U chassis. One SFP connector is used for a Gigabit Ethernet connection to your computer network.
Isolated TTL I/O EEMs
For simple TTL signals, we offer I/O cards with 8 channels over BNC or SMA connectors in the EEM form factor. The IOs are divided into two banks of 4, with per-bank ground isolation. The direction (input/output) and termination (high-Z/50R) is selectable on a per-channel basis via I2C or on-board switches. Outputs can supply 5V into 25Ohm, and can tolerate an indefinite short-circuit to ground.
LVDS I/O EEM
For high-density or faster signals, DIO_RJ45 is an extension module supplying 16 LVDS pairs via 4 front-panel RJ45 connectors.
Each RJ45 supplies 4 LVDS DIOs. The direction (input/output) is individually selectable for each signal via on-board switches. Outputs are intended to drive 100Ohm loads (LVDS is short-circuit protected), inputs are 100Ohm terminated. The connectors dedicate all 8 pins to LVDS signals, ground is on the connector shield so only shielded Ethernet cat 6 shielded cables are allowed.
Urukul DDS card
Urukul is a 4 channel DDS-based frequency synthesizer for the EEM form factor. It provides sub-Hz frequency resolution, controlled phase steps, and accurate output amplitude control. We offer it in two variants, with either the AD9910 or the AD9912 chip.
With the SU-Servo feature of ARTIQ, the AD9910 variant of Urukul (which has fine amplitude control) can be used in combination with the Sampler ADC to form a laser intensity servo. In this application, the Urukul card drives AOMs and photodiodes are connected to Sampler to monitor laser intensities. When ordering your system, specify that you want SU-Servo integrated into the gateware.
In regular mode, various DDS features are supported, including frequency, phase and amplitude control, and AD9910 RAM mode. See the ARTIQ manual for more details.
Zotino DAC card
Zotino is a 32-channel, 16-bit DAC EEM with an update rate of 1MSPS (divided between the channels). It was designed for low noise and good stability.
Zotino connects the 32 channels to both (a) a HD68 connector on its front panel and (b) to four IDC connectors on the board. Each IDC connection with 8 channels can be broken out to BNC using BNC-IDC.
It is also possible to connect the Zotino using a HD68 cable to an external crate containing BNC-IDC cards.
Sampler ADC card
Sampler is an 8-channel, 16-bit ADC EEM with an update rate of up to 1.5MSPS (all channels simultaneously). It has low-noise differential front end with a digitally programmable gain, providing full-scale input ranges between +-10mV (G=1000) and +-10V (G=1).
In SU-Servo mode, Sampler can be used in combination with Urukul to form a laser intensity servo. Otherwise, in regular mode, single sample values can be read out by ARTIQ kernels (due to CPU overhead, the actual sample rate in regular mode is reduced).
Grabber camera interface
Grabber allows the connection of certain scientific (EM)CCD cameras port to the core FPGA. Those cameras have a Camera Link interface.
In the FPGA, frame data streamed through "ROI engines". Each ROI engine gates on one rectangular pixel region and accumulates pixel values for each frame. The ROI engines operate independently and can be overlapping. After the frame, the accumulated value is pushed as an RTIO input event. Regions of interest (ROI) can be configured at runtime, and are defined with the computer.
A low-noise clock distribution module that can be used to distribute low jitter clock signal among 3U boards. 2 inputs, 10 outputs including 4 SMAs, frequency up to 1GHz, low jitter <100fs RMS.
Purchasing Sinara hardware
Kasli and most EEMs can be ordered now. We can deliver a rack-mountable crate that contains all the cards, is fully tested, and is ready to be connected to your experiment and computer network. Contact sales@m-***s.hk with your requirements and we will establish a quote.