The free and open dissemination of methods and results is central to scientific progress.
The ARTIQ and Sinara authors, contributors, and supporters consider the free and open exchange of scientific tools to be equally important and have chosen the licensing terms of ARTIQ and Sinara accordingly. ARTIQ, including its gateware, the firmware, and the ARTIQ tools and libraries are licensed as LGPLv3+. The Sinara hardware designs are licensed under CERN OHL. This ensures that a user of ARTIQ or Sinara hardware designs obtains broad rights to use, redistribute, study, and modify them.
ARTIQ and the related components that we are developing (Migen/MiSoC, nMigen, smoltcp, minimq, zynq-rs, SiPyCo, RayOpt, WFVM, ...) need to be kept on a sound financial basis. We have been relying on a combination of hardware sales, sponsorships, and grants.
We acknowledge support from our partners below. Please get in touch (sales@m-***.hk) if you also want to move ARTIQ forward!
ARTIQ was initiated by the Ion Storage Group at NIST, who provided valuable technical insight as well as financial support to develop the first version of the ARTIQ software and gateware targeting the KC705 development kit. This included some FPGA SoC libraries such as a SDRAM controller and PHYs, the first two iterations of the ARTIQ runtime including the development of smoltcp, the RTIO infrastructure and PHYs, the ARTIQ-Python LLVM-based compiler, RTIO DMA, the ARTIQ dashboard and browser, the ARTIQ master, and several controllers. They also supported the more recent ARTIQ port to Zynq, targeting the ZC706 development kit, and enabling ARTIQ-Python kernels to take advantage of the 1GHz CPU in the core device; as well as matrix and trigonometric function support in ARTIQ-Python kernels. Disclaimer: NIST and the United States government are not providing an endorsement of ARTIQ.
The University of Oxford funded major improvements to the RTIO infrastructure: the Distributed RTIO (DRTIO) system that allows clock synchronization and RTIO command transfer between FPGAs using cost-effective high-speed serial links (e.g. over fiber optics), and changes to the RTIO architecture to improve scalability. They also funded the Sinara Sampler hardware and software, the SU-Servo integrated laser intensity servo, parts of Urukul and Zotino, firmware development on the Sinara Thermostat, the Kasli v2.0 ARTIQ support, the Fastino ARTIQ support, parts of the Sinara Phaser gateware and software development, and significant parts of the Booster RF amplifier.
University of Oregon
The University of Oregon funded a large part of the Sinara Phaser gateware and software development, as well as firmware for the Pounder PDH/phase lock signal generator for Stabilizer.
Army Research Lab
The Army Research Lab funded the SAWG high-throughput digital waveform generator, as well as ARTIQ support for the Sayma and Metlino boards.
Humboldt University of Berlin
Humboldt University of Berlin funded prototype digital spectroscopy modulation/demodulation firmware, which is part of the "Optical quantum technologies on nanosatellites" (QUEEN) project.
Parts of ARTIQ and Sinara have been developed through the participation of our sister company QUARTIQ GmbH in European research grant programmes.
The BMBF project Opticlock developed an optical clock as a replacement for a hydrogen maser, based on a single ytterbium ion captured and laser-cooled in an ion trap. It helped fund the development of the Kasli, Urukul, Zotino and Sampler modules.