ARTIQ manual

Overview

• Introduction
• ARTIQ Releases
  • Release notes

Setting up ARTIQ

• Installing ARTIQ
  • Installing via Nix (Linux)
  • Installing via MSYS2 (Windows)
  • Installing via Conda [DEPRECATED]
  • Upgrading ARTIQ
• (Re)flashing your core device
  • Obtaining board binaries
  • Installing and configuring OpenOCD
  • Writing the flash
  • Connecting to the UART log
• Networking and configuration
  • Setting up core device networking
  • Configuring the core device
  • Configuring DRTIO satellites
• Building and developing ARTIQ
  • Installing Vivado
  • System description file
  • Nix development environment
  • Building ARTIQ

Tutorials

• ARTIQ Real-Time I/O concepts
  • Timeline and terminology
  • Output errors and exceptions
  • Input channels and events
  • Event spreading
  • Seamless handover
  • Synchronization
• Getting started with the core device
  • Host/core device interaction (RPC)
  • Real-time Input/Output (RTIO)
  • Parallel and sequential blocks
  • RTIO analyzer
  • Direct Memory Access (DMA)
• Using the management system
  • Running your first experiment with the master
  • Running the dashboard and controller manager
  • Adding a new experiment
  • Adding arguments
  • Interactive arguments
  • Setting up Git integration
  • Setting up secure communications
  • The ARTIQ session
• Data and user interfaces
  • Datasets and results
  • Non-RTIO devices and the controller manager
  • Using MonInj
  • Waveform
  • Shortcuts
• Using DRTIO and subkernels
  • Using DRTIO
  • Distributed Direct Memory Access (DDMA)
  • Subkernels

ARTIQ components

• Overview diagram
• Environment
  • The device database
  • Arguments
  • Datasets
• Compiler
  • ARTIQ Python code
  • Pitfalls
  • Flags and optimizations
• Management system
  • Components
  • Git integration
  • Experiment scheduling
  • Internal details
• DRTIO system
  • Terminology
  • The routing table
  • Internal details
• Core device
  • Configuration storage
  • Common configuration commands
  • Clocking
  • Types of boards
  • Board details
  • Variant details

Network devices

• Developing a Network Device Support Package (NDSP)
  • Components of a NDSP
  • The driver and controller
  • The client
  • Integration with ARTIQ experiments
  • Remote execution support
  • Command-line arguments
  • Logging
  • Additional guidelines
  • Hosting your code
• List of available NDSPs
• Default network ports

References

• Main front-end tools
  • artiq.frontend.artiq_run
  • artiq.frontend.artiq_master
  • artiq.frontend.artiq_client
  • artiq.frontend.artiq_dashboard
  • artiq.frontend.artiq_browser
  • artiq.frontend.artiq_session
  • artiq_comtools.artiq_ctlmgr
• Core language and environment
  • artiq.language.core module
  • artiq.language.environment module
  • artiq.language.scan module
  • artiq.language.units module
• Core real-time drivers
  • System drivers
  • Digital I/O drivers
  • RF generation drivers
  • DAC/ADC drivers
  • Miscellaneous
• Management system interface
  • In experiments
  • In applets
• Utilities
  • ARTIQ Firmware Service (AFWS) client
  • Static compiler
  • Flash storage image generator
  • Flashing/Loading tool
  • Core device management tool
  • Device database template generator
  • RTIO channel name map tool
  • Core device RTIO analyzer tool
  • DRTIO routing table manipulation tool
  • ARTIQ RTIO monitor
  • MonInj proxy
  • Core device RTIO analyzer proxy
  • Core device logging controller

Addenda

• NixOS for ARTIQ (preinstall handbook)
  • Getting started
  • Nix and declarative configuration
  • Customizing your configuration
  • Nix and NixOS tips
• Extending RTIO
  • Introduction to the ARTIQ internal stack
  • Extending gateware logic
  • Adding a custom EEM
  • Merging support
• FAQ (How do I…)
  • use this documentation?
  • build this documentation?
  • roll back to older versions of ARTIQ, or obtain it through other installation methods?
  • troubleshoot networking problems?
  • fix ‘Mismatch between gateware and software versions’?
  • fix unreliable DRTIO master-satellite links?
  • fix delay between DRTIO master and satellite cores?
  • add or remove EEM peripherals or DRTIO satellites?
  • see command-line help?
  • find ARTIQ examples?
  • fix failed to connect to moninj in the dashboard?
  • fix address already in use when running ARTIQ commands?
  • diagnose and fix sequence errors?
  • understand applet commands?
  • organize datasets in folders?
  • organize applets in groups?
  • organize experiment windows in the dashboard?
  • fix errors when restarting the management system after a crash?
  • create and use variable-length arrays in kernels?
  • understand how best to send data between kernel and host?
  • write part of my experiment as a coroutine/asyncio task/generator?
  • determine the pyserial URL to connect to a device by its serial number?
  • run unit tests?
  • find the dashboard and browser configuration files?
• Additional Resources
  • Other related documentation
  • “Help, I’ve done my best and I can’t get any further!”